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Inside the Lab: Building a Custom 4-Layer PCB from Scratch

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Behind the Mask: How Photolithography Works
I heard a saying today that is worth recording. When a person is working or studying, he always looks at his phone and the things around him.
From RTL to GDSII: ASIC Flow Simplified
A question asked by a forum friend. I have deduced it. The principle is not complicated. When designing specifically, we need to combine the mismatch parameters.
How DRC and LVS Save Your Chip
Preface: I used to think that clock gating check only involves AND/OR gates, until I discovered the minimum timing requirements.
EUV vs DUV: Lithography War Explained
This project is particularly suitable for companies that make radio frequency chips. The technical content is not high, but has potential.
Why PDKs Matter in IC Design
I have been working for 11 years since I graduated. I have worked in IC design front-end, state enterprises, HW, and small private companies.
Fabless vs IDM: Which Model Wins?
The three terms correspond to the same application, which is to use silicide to reduce the connection resistance on polysilicon.

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